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Shushi Hong fa903cf4f7 [Tests][TIRx] Localize hardware test gates (#19985)
This PR removes the suite-wide TIRx compute-capability gate and
localizes hardware skips to CUDA codegen and tile-primitive tests. It
keeps the original test parameterization unchanged, allowing parser,
printer, IR, transform, and other non-hardware TIRx tests to run in
regular CI while device-dependent cases are skipped when SM100 hardware
is unavailable. CUDA codegen helpers use explicit target architectures
where needed, and the run-only benchmark utility tests retain a local
SM100 gate.

This intentionally avoids adding separate compile/run parameter cases. A
follow-up PR can audit slow frontend execution tests and define a
focused runtime regression budget for real TIRx kernels.

Local validation:

- `pytest -n auto -m "not gpu" tests/python/tirx`: 486 passed, 79
skipped.
- `pytest -n auto -m gpu tests/python/tirx` without matching hardware:
1509 skipped.
- Pre-commit passed on all changed files.
2026-07-15 05:31:41 +08:00

37 lines
1.3 KiB
Python

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"""Hardware requirements for TIRx codegen tests."""
from pathlib import Path
import pytest
from tvm.testing import env
def pytest_collection_modifyitems(items):
if env.has_cuda_compute(10):
return
suite_root = Path(__file__).resolve().parent
skip = pytest.mark.skip(reason="requires a CUDA compute capability 10.0 device")
for item in items:
if (
Path(item.path).resolve().is_relative_to(suite_root)
and item.get_closest_marker("gpu") is not None
):
item.add_marker(skip)