[TIRx] Bundle CUDA tile primitive and op dispatch updates (#19896)
## Summary
This bundles the 18 commits currently carried in `spectrometerHBH/tvm`
on top of `apache/tvm:main`.
Major areas:
- Extend CUDA TIRx tile primitives and op dispatch paths, including
vector PTX ld/st, shared-memory copy paths, TMA/tcgen05 descriptor
handling, dense FP8/TF32 `gemm_async`, and CUDA elementwise tile
dispatch.
- Add support utilities for benchmark timing, CUDA ptxas option
plumbing, and TMA/TFLOAT32 descriptors.
- Fix unsigned integer floormod/floordiv simplification rewrites without
overflow and update the corresponding TIRx constant-folding tests.
- Update TIRx dtype handling for upstream `PrimType` compatibility.
- Add and update TIRx CUDA/operator tests for copy, elementwise, permute
layout, and `gemm_async` behavior.
## Validation
- `git diff --check apache/main..HEAD`
- `python -m tirx_kernels.bench_suite --check-imports`
- `python -m tirx_kernels.registry --cc 10 --strict`
- `python -m pytest tests/python/tirx/ -n 16`
- `2033 passed, 39 skipped, 3 xpassed`
- `python -m pytest tests/python/tirx-base/test_tir_imm_values.py -q`
- `44 passed, 6 warnings`
- `pre-commit run --files tests/python/tirx-base/test_tir_imm_values.py`
- Focused TIRx regression tests after formatting:
- `test_cast_vec2_packed_dispatch`
- `test_cast_warpgroup_src_layout_to_flat_uses_vec2_intrinsic`
- `test_gemm_tcgen05_cta_group_1[task0]`
- Full `bench_suite --impls all` sweep: 256/256 workloads completed
successfully.
- Apache PR CI on `928a0605d0`: all required GitHub Actions and Jenkins
checks passed.
Bohan Hou
4224d51090