83 Commits

Author SHA1 Message Date
William Raveane 9a8f5b92c1 EfficientNMS TFTRT Plugin Updates
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
skarunaratne f31dbefd3f Minor fixes for proposalPlugin README
The README.md mentioned that "The proposalPlugin generates the following
two outputs:" even though it only generates one output named `rois`. Also
fixed two mismatches in parameter names in README and the code.

Signed-off-by: skarunaratne <skarunaratne@nvidia.com>
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
Rajeev Rao e212c90446 Initialize attributes of geluPlugin
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
Reese Wang 14594a1dc0 Extend Megatron plugins (embln, skipln) ld support
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
Samurdhi Karunaratne d36b0302d8 Document limitations on #anchors in a few plugins
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
zhimengf@nvidia.com 2fcf23676a Plugins for PointPillars
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
Kevin Chen 06dfeb7ab9 BERT plugin updates for TensorRT 8.2.2.1
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
Rajeev Rao 5698919c71 Unify IOU calculation in batchedNMS
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2022-02-04 08:23:59 -08:00
Vincent Huang 6f38570b74 TensorRT-OSS 8.2 GA release
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-11-24 10:15:53 -08:00
Rajeev Rao 2d517d270e TensorRT OSS v8.2 Early Access Release
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-10-05 11:30:06 -07:00
William Raveane 532557026e EfficientNMS: Dynamic Input Shape
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-09-22 12:55:39 -07:00
Stephan Seitz 5a44e7b7c9 Fix assertion in EfficientNMSPlugin
Documentation states:
```cpp
    // Shape of boxes input should be
    // [batch_size, num_boxes, 4] or [batch_size, num_boxes, 1, 4] or [batch_size, num_boxes, num_classes, 4]
```
however, the second possibility `[batch_size, num_boxes, 1, 4]` triggers a false positive in an
assertion. The third dimension must be either equal to 1 or the number
of classes.

Signed-off-by: Stephan Seitz <sseitz@nvidia.com>
2021-09-22 10:24:46 -07:00
Kevin Chen 0b65abfbd8 Update plugin directory structure
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-08-05 13:14:13 -07:00
William Raveane 3235cc2ffc EfficientNMS Updates: Empty Input Tensor + TX1/TX2 Resources
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-07-08 14:50:27 -07:00
Rajeev Rao aff45dd565 TensorRT OSS 8.0 release
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-07-02 16:35:44 -07:00
Kevin Chen a2b3d3d5cc Add switch for batch agnostic mode in NMS plugin
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-06-23 12:06:05 -07:00
Rajeev Rao d4a5e08a3b Clang-tidy plugins
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-06-23 12:06:05 -07:00
Tyler Zhu d742af876d Optimize TLT MaskRCNN plugins
- enable fp16 precision in multilevelCropAndResizePlugin and multilevelProposeROIPlugin
- Algorithms optimization for NMS kernels and ROIAlign kernel
- Fix invalid cuda config issue when bs is larger than 32
- Fix issues found on Jetson NANO

Signed-off-by: Tyler Zhu <tylerz@nvidia.com>
2021-06-23 12:06:05 -07:00
zhimengf@nvidia.com c5b8cf67fb Fix numerical errors for floats in NMS/batchedNMS plugins.
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-06-23 12:06:05 -07:00
Rajeev Rao f00665c362 Add InstanceNorm3D plugin and update ONNX parser to 21.05
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-05-19 13:56:12 -07:00
Rajeev Rao b855656005 TensorRT-OSS 21.05 release
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-05-19 13:56:12 -07:00
Kevin Chen 3835424af0 Populate QKV plugin attributes (#1190)
Signed-off-by: Kevin Chen <kevinch@nvidia.com>
2021-04-13 15:30:57 -07:00
Rajeev Rao 64fa61b415 Add varlen MHA fp16 slen=384 kernels for sm_86
1. add varlen mha fp16 slen=384 kernel for sm_86
2. referesh all sm_86 kernels now use NVCC -gencode=arch=compute_86,code=\"sm_86\"
3. use unfused kernel for fixed len s=384 fp16

Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-04-12 14:56:06 -07:00
Vincent Huang 2e875dbb28 fix doc for bert plugins
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-04-12 14:56:06 -07:00
Rajeev Rao 80e2473bdb serialize CPU data of PriorBox to engine only
PriorBox plugin serialize CPU metadata (array size) A and GPU data
(array elements) B' in engine. B' is modified from CPU array B
when constructing the object. A deserialized object then holds data
A and B' which is different from the original (A and B).

If a new object is created from a deserialized one via `PriorBox::clone()`,
which rebuilds array elements at GPU side from CPU holding array A and
B', the generated GPU data is incorrect (A and B''), resulting in
wrong inference result.

As PriorBox is designed to track data in specific format, we now
serialize only the CPU data A and B, i.e. the parameters that used to
construct a PriorBox object, to engine.

bad image processing with deserialized engine

1. Fixed the memory deallocation error in plugin PriorBox::clone() method
even without serialization by initializing empty pointer to nullptr.

2. Initialized weights to empty structs

3. Added mParam.aspectRatios to serialization and deserialization since
mParam.aspectRatios are different from aspectRatios device weights in count and values.

Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-04-12 14:56:06 -07:00
Rajeev Rao 932bcd6893 Avoid arithmetic on void pointer in multilevelProposeROIPlugin.cpp #1028
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-04-12 14:56:06 -07:00
Rajeev Rao 1fe5532c0c Allow MHA plugin to run on SM_86 as well
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-04-12 14:56:06 -07:00
Rajeev Rao cc5dede848 clang-format plugins and samples
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-04-12 14:56:06 -07:00
Rajeev Rao da405547b0 Removes extra terminate call in InstanceNorm
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-04-12 14:56:06 -07:00
Tom Peters 0dcade2184 don't violate strict aliasing with reinterpret_cast
Signed-off-by: Tom Peters <thomas.d.peters@gmail.com>
2021-03-18 22:49:40 -07:00
Mickaël Seznec 4e5e724891 Use right CMake variable for cu files in GroupNorm
In groupNormalizationPlugin, the .cu files are not added to
PLUGIN_CU_SOURCES, contrary to other plugins.

This is problematic because the NVCC flags are not set correctly when
compiling those .cu files, e.g. GENCODES.

While this is not a direct issue for this plugin in particular, it
should be fixed as the documentation refers to it for building new
plugings.

Signed-off-by: Mickaël Seznec <mickael.seznec@gmail.com>
2021-03-18 22:12:34 -07:00
zhimengf@nvidia.com 19910a4c95 Bugfixes for decodeBBoxes kernel.
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-03-18 02:45:54 -07:00
zhimengf@nvidia.com 068350b021 create ProposalDynamic and CropAndResizeDynamic plugins.
- create ProposalDynamic and CropAndResizeDynamic plugins
- Fix bug in mFC.nbFields

Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-03-18 02:45:54 -07:00
zhimengf@nvidia.com d5b878a18e optimized FP16 NMS/BatchedNMS plugins.
- enable n-bit radix sort for NMS_TRT plugin
- implement NMSDynamic_TRT plugin and enable n-bit radix sort for it
- enable n-bit radix sort for BatchedNMS_TRT and BatchedNMSDynamic_TRT plugins
- fixed a bug in configurePlugin() method of BatchedNMS_TRT
- other minor fixes for BatchedNMS_TRT/BatchedNMSDynamic_TRT plugins

Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-03-18 02:45:54 -07:00
yuanzexi 10a51bed54 Fix a computational problem of scaledSoftmax.
The original implementation results in wrong results of sum of softmax such that the results of BERT models (128 < seq_len < 384 and seq_len > 384) are very large or even 'nan'.
This implementation fix the computational problem such that the results of BERT models (128 < seq_len < 384 and seq_len > 384) become correct.

Signed-off-by: yuanzexi <hiyuanzexi@outlook.com>
2021-03-18 02:45:54 -07:00
Rajeev Rao d7baf010e4 TensorRT OSS 21.02 release
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-02-05 14:22:04 -08:00
Rajeev Rao 183f891191 Update onnx-tensorrt and copyright headers (2021)
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2021-01-14 01:16:45 -08:00
Rajeev Rao 0d538ddedc Explicit casts to resolve compiler errors in __half type conversion
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
Signed-off-by: Paul Bridger <paul@paulbridger.com>
2021-01-13 17:56:41 -08:00
Paul Bridger aa1b4b09d6 fix failing NMS on fp16 due to issue with box-size calculation
Signed-off-by: Paul Bridger <paul@paulbridger.com>
2021-01-13 17:56:41 -08:00
Paul Bridger 2c942e3fb2 fix serialization size
Signed-off-by: Paul Bridger <paul@paulbridger.com>
2021-01-13 17:56:41 -08:00
Paul Bridger 42dbbb0ef3 add fp16 capability to batchedNMSPlugins
Signed-off-by: Paul Bridger <paul@paulbridger.com>
2021-01-13 17:56:41 -08:00
Tyler Zhu b4be515bde Add configurable input size for TLT MaskRCNN Plugin
Signed-off-by: Tyler Zhu <tylerz@nvidia.com>
2020-12-09 15:52:08 -08:00
Rajeev Rao ba869aaeb7 Update symbol export map for plugins
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2020-12-08 12:02:47 -08:00
Rajeev Rao f83010efaa Remove unused private field in proposalLayerPlugin
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2020-11-13 10:33:40 -08:00
Rajeev Rao f9496824ca Fix redundant assert for SM86 in BERT plugin (#876)
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2020-11-02 23:04:10 +08:00
Rajeev Rao 492878b2df TensorRT OSS release v7.2.1
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2020-10-20 16:48:23 -07:00
Rajeev Rao 275eefce39 Restore lReLUPlugin in OSS
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2020-09-04 15:45:15 -07:00
Kevin Chen 763952d70f Support 3D instanceNormalization (#745) 2020-08-12 16:24:13 -07:00
Rajeev Rao 2ead004912 Update batchedNMS plugin to IPluginV2DynamicExt (#738)
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2020-08-06 11:10:19 -07:00
Rajeev Rao 94cc82bf6c Clang-format fixes
Signed-off-by: Rajeev Rao <rajeevrao@nvidia.com>
2020-07-27 10:31:31 -07:00