Wuwei Lin d4a396825b [TIR] Add schedule primitive TransformBlockLayout (#11485) ...

* [TIR] Add schedule primitive TransformBlockLayout

* fixup! [TIR] Add schedule primitive TransformBlockLayout

Fix doc

2022-05-29 12:12:17 -04:00

..

analysis

[TIR][MetaSchedule] Estimate TIR FLOPs (#10782)

2022-03-25 09:57:16 -04:00

schedule

[TIR] Add schedule primitive TransformBlockLayout (#11485)

2022-05-29 12:12:17 -04:00

tensor_intrin

[Software pipeline] Fix hardcoded index in access_ptr rewriting, add a GPU test with depth 4 (#11495)

2022-05-28 09:47:45 +09:00

transform

[TE][TIR] Implement layout transformations, non-flat memory buffers (#9727)

2022-03-06 21:21:50 -05:00

usmp

[USMP] adding support for U2 and U3 usecases (#10193)

2022-02-14 09:54:06 +00:00

__init__.py

[TIR][Analysis] Add SuggestIndexMap for layout rewriting (#10732)

2022-03-25 11:19:46 -07:00

_ffi_api.py

…

buffer.py

[TIR] Get read/write access precisely for opaque access. (#11110)

2022-04-28 21:00:29 +08:00

data_layout.py

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expr.py

[TE] Promote substituted variable to iter_var's dtype (#10571)

2022-03-12 10:16:15 +09:00

function.py

[TIR][Schedule] Transform layout quality of life (#11269)

2022-05-25 17:19:33 -07:00

generic.py

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ir_builder.py

[TIR] Fix int32 vs int64 mismatch in For construct. (#10595)

2022-04-05 15:08:36 +09:00

op.py

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stmt_functor.py

[TIR] StmtFunctor RenewDefs (#10843)

2022-04-21 10:55:04 -07:00

stmt.py

[TIR] Updated python docstring and parameter names for AllocateConst (#10602)

2022-03-15 06:20:02 +09:00