Commit Graph

3803 Commits

Author SHA1 Message Date
Luke Hutton 94d01d3565 [microNPU] Add support for hard swish (#12120)
Adds support for hard swish by populating a LUT similar to Vela's
implementation.

Change-Id: I7ca15a3e21bc91c1b41cdd4547fabaa00de96e90
2022-07-19 08:28:45 +01:00
Andrey Malyshev 6bad21e9fe [Texture] Add 2d memory support into static memory planner (#11876)
* [Texture] Add 2d memory support into static memory planner

Co-authored-by: Chris Sullivan <csullivan@octoml.ai>

* Add test verifying GraphPlanMemory work for 2d memory

Co-authored-by: Chris Sullivan <csullivan@octoml.ai>
2022-07-19 05:39:59 +09:00
abhikran-quic c0e996e291 [TOPI] [Hexagon] Uint8 Reshape and batch flatten slice ops (#12037)
* [TOPI] [Hexagon] Uint8 Reshape and batch flatten slice ops

* Fix documentation
2022-07-16 10:10:39 -05:00
Wuwei Lin 895f79f42a [MetaSchedule] Allow MultiLevelTilingTensorCore rule to specify multiple tensor intrin groups (#12113) 2022-07-16 13:17:31 +09:00
Mark Shields 0d70f690ea [Relay] Allow partial virtual device annotations. (#12107)
* [Relay] Allow partial virtual device annotations.

Previously CompilationConfig::CanonicalVirtualDevice required
the argument virtual device to contain a device type. However
now that virtual devices may contain memory scopes that's
unnecessarily strict.

With this change it is possible to write virtual device
annotations with just memory scopes, and let PlanDevices
flow those constraints along with the usual device constraints.

* - Make sure CanonicalVirtualDevice reuses FullyUnconstrained
2022-07-15 14:34:28 -07:00
Mark Shields d4365011f5 [Collage] PruneCandidates and demo_collage_partition.py (#12105)
* [Collage] PruneCandidates and demo_collage_partition.py

See https://github.com/apache/tvm-rfcs/blob/main/rfcs/0062-collage.md.

This completes our checkin of our Collage 'sketch' branch into main. Special thanks
to Matthew Barrett for his help getting this over the line.

The only C++ functionality added here is for 'pruning' candidates. This is a somewhat
speculative algorithm (and I've called that out in the comments) which tries to
elide candidate partitions which will 'obviously' not contribute to the final optimal
partitioning. For largish models such as GPT2 this can significantly reduce the number of
candidates we need to actually measure latency on. I beefed up the MockCostEstimator to
make it possible to assert pruning occured from within the test_pass_collage_partition.py
unit test.

The rest of this PR adds the demo_collage_partition.py driver file we've been using
to test and measure perfomance differences against various baseline (though only
for the CUDA ecosystem). To eliminate loading time the models of interest are directly
expressed in Relay text form in menangerie.py.

* - lint
2022-07-15 11:04:33 -07:00
Wuwei Lin e0a0e67e55 [Relay, Op] Add conv2d generic layout op strategy when meta schedule is enabled (#12104) 2022-07-15 16:39:56 +09:00
billishyahao fa057213d4 Enable conv family fused with gelu (#12106) 2022-07-15 16:39:33 +09:00
Tristan Konolige 37f9d3c496 [TVMSCRIPT] Make ceildiv available from tvmscript (#12096) 2022-07-15 09:22:33 +09:00
Josh Fromm c0f4450958 Fix bug that disabled cuda integer dot product. (#12099) 2022-07-15 09:22:17 +09:00
Mark Shields 7661ba8910 [Collage] CollagePartition pass (#12086)
* [Collage] CollagePartition pass

See https://github.com/apache/tvm-rfcs/blob/main/rfcs/0062-collage.md.

This adds the main CollagePartition pass, which:
 1. Inspects all the targets in the CompilationConfig and builds
    PartitionSpecs describing how to generate speculative CandidatePartitions
    for them.
 2. Runs the above rules on the model to collect all the candidates.
 3. Eliminates candidates whose target contradicts any constraints already
    imposed by, eg, device planning.
 4. Eagerly estimates the cost of each candidate.
 5. Performs a shortest path search to chose an 'optimal' set of candidate
    partitions so as to minimize estimated model latency, such that every sub-expression
    node is contained in exactly one candidate partition.
 6. Coalesces adjacent optimal candidates which ended up on the same target.
 7. Rewrites the model according to the chosen optimal partitioning.

As for the existing partition_for_<external codegen name> methods, the result of
CollagePartition can then be built using regular TVM.

Very special thanks to @mbaret for authoring test_pass_collage_partition.py.

Logic to prune the candidates after step 3 will be in a follow up PR since it
deserves its own testing. A demonstration driver will also come as a follow up.

* - lints

* - more lints

* - use the _ffi_api properly
2022-07-14 22:30:44 +01:00
Wuwei Lin e084791852 [MetaSchedule] Add MultiLevelTilingTensorCore rule for auto-tensorization on CUDA (#12059)
* [MetaSchedule] Add MultiLevelTilingTensorCore rule for auto-tensorization on CUDA

Co-authored-by: Bohan Hou <32121147+spectrometerHBH@users.noreply.github.com>
Co-authored-by: Hongyi Jin <3231950289@qq.com>

* address comments

* update intrin registrations

* fix tests

* address comments

* add warning when storage align doesn't work

* remove print

Co-authored-by: Bohan Hou <32121147+spectrometerHBH@users.noreply.github.com>
Co-authored-by: Hongyi Jin <3231950289@qq.com>
2022-07-14 13:32:11 -07:00
Andrey Malyshev 2fee86e43b [Releay] Fix on_device call for explicit virtual_device (#12088) 2022-07-15 04:21:27 +09:00
Donglin Zhuang f6f90569bc Add tensorflow Einsum op converter (#12064)
* Add tensorflow Einsum op converter

* fix lint

* fix lint
2022-07-14 20:15:41 +09:00
Wuwei Lin a571bfbbca [TOPI] Allow conv definition to have custom kernel layout (#11936)
* [TOPI] Allow conv definition to have custom kernel layout

* add tests

* fix

* fix
2022-07-13 20:42:38 -07:00
Greg Bonik a9c610f1c0 [TVMScript] Add ObjectPath class (#11977)
Motivation:

Same IR node object can be referenced in several different contexts inside a larger IR object. For example, a variable could be referenced in several statements within a block.

This makes it impossible to use an object pointer to uniquely identify a "location" within the larger IR object for error reporting purposes. The `ObjectPath` class addresses this problem by serving as a unique "locator".

Tracking issue: https://github.com/apache/tvm/issues/11912
2022-07-13 16:03:11 -07:00
masahi c30b420f61 [TOPI, x86] Properly handle fused ops in TE softmax schedule (#12015)
* fix x86 softmax fusion

* properly handle the case where softmax and fuseed op having different layout

* add test
2022-07-13 14:08:05 +02:00
Mark Shields b1a3817602 [Relay] Move TOpPattern registration for nn.* to C++ (#12072)
* [Relay] Move TOpPattern registration for nn.* to C++

Some of the Collage machinery is best tested from C++, but
requires Relay ops to have their "TOpPattern" registered.
However since the nn.* ops register on the Python side tests
can't rely on those ops.

The easy fix is to just move the registration to the
RELAY_REGISTER_OP block. However since kOpaque is the
default I did not preserve those registrations.

There's still a few dozen more exotic ops still registered
on the Python side. I've left them be.

* - D'oh! Even kOpaque ops must be registered.
2022-07-12 13:55:24 -07:00
arangasa 6536def6f9 [Topi][Hexagon] Implement Cast F32ToF16 and F16ToF32 Slice Op (#11561) 2022-07-12 13:15:48 -07:00
Qingchao Shen ad44a0fe15 fix some typo in conv2d.py (#12067) 2022-07-13 04:03:59 +09:00
zhaoyang-star ef5c3ed872 [QNN] Use sigmoid Lookup Table method instead of fallback to fp32 (#12038) 2022-07-12 09:58:11 -07:00
zhaoyang-star 6d676badff [QNN] Replace nn.leaky_relu with qnn.leaky_relu (#11930)
* [QNN] Replace nn.leaky_relu with qnn.leaky_relu

* jostle ci

* fix typo
2022-07-12 09:57:54 -07:00
Rafael Stahl 993a8ea094 [Frontend][TFLite] respect out type of Shape op (#11877)
* [Frontend][TFLite] respect out type of Shape op

* tests: update for changes to tflite shape handling

* lint fix
2022-07-12 09:57:17 -07:00
Nicola Lancellotti fbf80bb386 [microNPU] Add MergeConstants pass (#12029)
* [microNPU] Add MergeConstants pass

Change-Id: I1ff51d8147fba8c66d442a370b9f058e9b2758d8

* Fix errors and warnings

Change-Id: I29f68f83a73fa00ca34ed0ab2321c53c6b761137

* Address comments

Change-Id: Iad59107d5abdec6b079c6fd4ab48c6bffbb5e0bb

* Fix lint error

Change-Id: Ie5caf506337de01e169d6f422e4682eefbd93241
2022-07-12 17:23:44 +01:00
Dmitriy Smirnov 7baf4be2d4 [relay] Changed 'name' field to 'registry_name' for Executor and Runtime (#10466)
* [relay] Changed Executor and Runtime 'name' field to 'registry_name'

Changed 'name' field to 'registry_name' for Executor and Runtime python
wrappers as it clashed with tvm object attribute 'name' which made the latter
inaccessible from Python

Change-Id: I917755753549edfe1d3090ca9ca4512de552c4bd

changed name to registry_name

Change-Id: I9feb5b33b7b6f6f8421902e5721167f585cc4193

* more fixed unit tests

Change-Id: Ie2e96297fda119e1b726b196a59deae95b263a07

* typo fixed

Change-Id: Id579c50ab58dfb25fa18436265e0701ebbd9d554

* renamed registry_name to flag_registry_name

Change-Id: Iabbd81069959f05c073f9dbc8d10fb31dd05f7a3

* bugfix
2022-07-11 14:37:20 -07:00
Everton Constantino ae72e7e653 Fix node.func to node.funcs on parser.py (#12053) 2022-07-11 16:03:14 -05:00
Rafael Stahl c4dc41a0dd [Frontend][TFLite] PreLU alpha can be an expr (#11879)
* [Frontend][TFLite] PreLU alpha can be an expr

* [Frontend][TFLite] handle both cases of PreLU alpha param
2022-07-11 10:06:20 -07:00
Kathryn (Jinqi) Chen 9ee25eb9f4 [MetaSchedule] Added a cost model (#11961)
In this PR, I added a cost model based on SegmentSum MLP, which can be used for pre-training or integration with TVM.
2022-07-11 04:32:13 -07:00
billishyahao 2d5072858c enable bmm (#12018) 2022-07-11 19:09:58 +09:00
Jiabei Zhao fbb7b5d1a0 Add xgboost version restriction (#12050)
Co-authored-by: jiabeizhao <jiabeizhao@tencent.com>
2022-07-11 18:00:21 +09:00
Krzysztof Parzyszek cf15375e20 Several type mismatch fixes and checks (#12041)
* Compute common type for shape elements in BroadcastHelper

The corresponding dimensions in the input/output tensors in a broadcast
operations may have the same value, but different types (e.g. int32 vs
int64).
When the broadcast helper tries to unify the dimensions it also needs
to compute the common type to hold the dimension.

* Cast and simplify both members of `Range`

Only the `min` member was type-casted, which could lead to ranges with
different types for `min` and `extent`.
Move the casts to the argument of Simplify, so that they can be eliminated
if they aren't needed.

* Type-check iv domain ranges, use cast only if needed in MakeLoopNest

In some cases the domain ranges had the `min` and the `extent` values
be of different types (e.g. [(int64)0, 32)). This is an error, and it
can lead to compilation failures later on. Add a check for equal types
here to catch this early.
Also, only add the cast operation when the desired type differs from
the current one to keep the expressions simpler.

* Check that variable and substituted expression have same types

Add a check to IRSubstitute to detect when the type of a variable and
the type of the expression to replace it with have different types.

* Add testcase

* [TVMScript] Use void for lambda parameters, allow mismatch in Substitute

When the script parser deals with lambdas, it creates Var objects for each
parameter. Their actual types are not known at the time, and the properly
typed variables are subtituted in the body later. Since the default dtype
of a Var is "int32", this could lead to a type mismatch in Substitute.
To deal with this scenario, use "void" for newly created Vars in the
parser, and add an exception to Substitute to allow replacing void Vars
with expressions of any type.

* Fix type error in test_reduce_combiner_simplify

* Restart CI

Co-authored-by: Jiawei Liu <jaway.liu@gmail.com>
2022-07-11 10:05:21 +09:00
Ivy Zhang 927620e20f [BYOC-DNNL] support more post-ops (#12002)
* support post-op swish

* support post-op clip

* enhance get_shape and get_dtype in dnnl.py to support efficientnet

* add checks for with_eltwise whether in supported list

* fix lint

* fix test
2022-07-11 09:55:57 +09:00
Junru Shao 99d42b2238 [MetaSchedule][Testing] Test search space of conv1d (#12032)
* [MetaSchedule][Testing] Test search space of conv1d

* Add checks for trace roundtripping
2022-07-07 14:05:59 -07:00
Xiyou Zhou 013d5e8fcb [MetaSchedule][Minor] Stability Improvements (#12014)
* Fix tuning util for uint8.

* Change to check runner_result.

* Revert change to let cost model learn.
2022-07-07 12:44:18 -07:00
Zhengqiang Yin af4373f2fb [Fix] fix python setup.py file bug (#12000)
* fix setup.py bug

Signed-off-by: Zhengqiang Yin <codle@outlook.com>

* remove data_files field

* keep a init setup_kwargs
2022-07-07 14:38:27 -05:00
abhikran-quic c76d8e2bdb [TOPI] [Hexagon] Reshape slice op (#11983)
* Reshape slice op. This patch adds the initial python implementation reshape slice op for hexagon.

* Add tests for reshape op
2022-07-07 11:19:01 -07:00
Xiyou Zhou 7874bf806e [MetaSchedule] Support ApplyHistoryBest Direct Dispatch (#12016)
This PR introduced a new argument for `ApplyHistoryBest`'s `Query` interface to allow direct dispatch without querying the database, would be useful for debugging and benchmarking without interference.
2022-07-07 09:31:41 -07:00
yuanfz 40d242a3c8 [Pytorch] add aten::rnn_tanh, aten::rnn_relu (#12017)
* emptycommit 2nd try

* dev

* comments

* format

* format

Co-authored-by: yuanfz <42092999+FZYUAN-1@users.noreply.github.com>
2022-07-07 15:37:48 +09:00
Lite Ye 9f4bf38b57 [TVMScript] Doc Base Class & DocPrinter Scaffolding (#11971)
This PR addes:
- Doc base class
- DocPrinter base class
- PythonDocPrinter
- LiteralDoc and its support in DocPrinter

Tracking issue: #11912
2022-07-06 22:11:10 -07:00
Luke Hutton cfe8318990 [microNPU] Calculate memory pressure for microNPU external functions (#11209)
* [microNPU] Calculate memory pressure for microNPU external functions

During the microNPU compilation stage, the "used_memory" annotations on
external microNPU functions are read to determine a memory pressure
value. This value is passed to the cascader to better approximate the
memory available for the optimization.

Change-Id: I11a311b0005e785637014cb451f4aed96edcda26

* fix get size from memory region

Change-Id: I41acfc83f05b2204075edb99f86a0eecaba00f71

* add test case for full offload

Change-Id: If3e672d402ab237fa82e34761bb972d2e9483ba9
2022-07-06 16:46:29 +01:00
Anirudh Sundar 95f578912f [Topi] [Hexagon] Conv2d slice op initial version (#11489) 2022-07-06 09:52:44 -05:00
Yuanjing Shi 5bc6684c9d add aten::randn (#11994) 2022-07-06 09:11:57 +09:00
Gavin Uberti 3cca6465ba [microTVM] Autotuning performance tests (#11782)
* Common autotuning test

* Autotuned model evaluation utilities

* Bugfixes and more enablement

* Working autotune profiling test

* Refactoring based on PR comments

Bugfixes to get tests passing

Refactor to remove tflite model for consistency

Black formatting

Linting and bugfixes

Add Apache license header

Use larger chunk size to read files

Explicitly specify LRU cache size for compatibility with Python 3.7

Pass platform to microTVM common tests

Better comment for runtime bound

Stop directory from being removed after session creation

* Use the actual Zephyr timing library

Use unsigned integer

Additional logging

Try negation

Try 64 bit timer

Use Zephyr's timing library

Fix linting

Enable timing utilities
2022-07-05 10:36:26 -07:00
Ivy Zhang b7e299f4a4 [BYOC-DNNL]rewrite downsize blocks for rensetv1 to get better performance (#11822)
* rewrite downsize blocks for rensetv1 to get better performance

* fix lint
2022-07-05 16:41:25 +09:00
Black 83b310d5a4 [Frontend][TFLite] Add support for NonMaxSuppressionV5 op (#12003)
* add nms_v5 op for TFLite

* add a test for the TFLite nms_v5 op
2022-07-05 15:17:16 +09:00
Andrey Malyshev ef08c36294 [Adreno] Modify default AutoTVM params for conv2d (#12005) 2022-07-05 13:04:02 +09:00
Junru Shao f8186d8c7d [TIR] Add sugar method Schedule.work_on (#11999)
This PR introduces `Schedule.work_on`, which instructs
`Schedule.get_block` to find the correct PrimFunc to retrieve from
without having to specify `func_name` in every time if the PrimFunc's
name is not `main`.
2022-07-03 13:16:18 -07:00
Yuanjing Shi 1787cca3f9 [Relay] [PyTorch] Add aten::tril and aten::triu (#11890)
* add trilu

* update triu and tril; fix empty

* fix lint
2022-07-02 07:24:52 +09:00
Mark Shields d2a14a6880 [BYOC] Switch TensorRT BYOC integration to IRModule-at-a-time using RelayToTIR hook (#11979)
* [BYOC] Switch TensorRT BYOC integration to IRModule-at-a-time using RelayToTIR hook

This does for the TensorRT integration what #11631 did for the CUTLASS integration.

- All compilation options are captured within the attributes of a Target of
  kind "tensorrt" (instead of the "relay.ext.tensorrt.options" attribute in
  PassContext). This means all BYOC configurations options needed by Collage can
  be captured uniformly by a list-of-Targets. It also means RPC boundaries (as used
  internally at OctoML) only need to worry about maintaining the fidelity of the
  Target instance(s) rather than reaching into the PassContext.

- Compilation is switched from function-at-a-time (relying on the TECompiler) to
  IRModule-at-a-time (using the RelayToTIR target-specific hook mechanism). Though
  not strictly necessary for Collage I want to check the path is now clear to
  deprecate the support for BYOC in TEComplier.

- Get all the TensorRT tests going again, except for a few I've disabled with
  x-link to a new issue #11765. CAUTION: The TensorRT runtime is not supported in
  CI so many of these tests are cosmetic.

- While trying to track down a 'free(): invalid pointer' error in test_tensorrt_int8_exp.py
  made the TensorRT allocs/frees more robust, but turns out its also broken in main.
  No harm leaving these changes in though.

* - Lints

* - Woops, fix test

* - lints

* - Use default tensorrt target if none given in targets list

* - fix free error

* - accidentally introduced 'transforms' namespace
- can't use default Target("tensorrt") arg

* - D'oh! Include ended up #if protected

* - restore mark for test_dynamic_offload
- handle missing runtime in versioning
- turn test_maskrcnn_resnet50 back on now that we have the
  import-torch-first workaround.

* - wibble
2022-07-02 07:09:06 +09:00
joshherr-quic 50cd4d635c [Hexagon] Enable int8 vlut codegen for Relay take (LUT) operator (#11693)
* Working 8 bit vlut for relay take operator

* Formatting

* More formatting

* clang-format on codegen_hexagon.cc

* Update for llvm api

* Add return to VisitExpr(BufferLoadNode) function

* different llvm api
2022-07-01 15:50:35 -05:00