* banker round op added based off tutorial
* black'd onnx.py file
* retriggering CI with empty commit due to autoscheduler test failure
* removed youtube link in comments
* retriggering CI due to test failure that passed locally
* [TE] Optimized version of concatenation layer
1. Concat implemented using extern_op
2. New tests added.
3. Workaround to allow inline extern_op-s with other layers.
* *test fix
* test_any.py fix.
* test_forward.py from tensorflow fix.
* lint fix.
* Fixes after code review.
* New comment added.
* Lint fix.
* Another lint fix.
* Comments added.
* rebase issue fix.
* Restored previous state.
* Update after code review.
* After code review changes.
* lint review.
* Change strategy for cuda to fix tests.
* Rebase to main
* Comments changes after review.
* Some more comments fixes.
* One more error fix in comments.
* restart build
This PR allows `relay.backend.MetaScheduleExtractTask` to take an extra argument `filter_func` which filters out tasks that don't need tuning. The counterpart of AutoScheduler is `traverse_to_get_io_tensors`.
* Test with CMSIS build added
disabled conv2d_nhwc_dsp.arm_cpu for non integers workloads
added debugging feature to TempDirectory
* revert arm_cpu strategy changes
* Address Andrew comments
* change copy to include
* add cmsis_path only as project option
* simplify (x * 96) % 64 to (x * 32) % 64
* adapt merge mulmod opt for OffsetOf computation
* merge DetectIterMap and DetectIterMapPadded
* adjust related interfaces for IterMapLevel
* - check incompatible left paddings
- determine case like x % 16, x in [0, 5) to be non-surjective, since usages may treat the region extent as 16 by mistake.
- skip second round of rewrite when there is no padding
- fix some typo in comments
* rebase upstream
This commit adds end-to-end tests using the cascader
w/o striping. It needed few adjustments to the order
in which the arugments are provided to the entry point
function in AoT when both memory pools and devices
are present.
Change-Id: I37e04afd635add895e317586f628a62cae75f3fa
* [TVMScript] Allow T.Buffer[] arg annotation to use int as shape
Both the function `tvm.tir.decl_buffer` and the TVMScript
`T.match_buffer` expression allow a `PrimExpr` to be passed as the buffer
shape, which is interpreted as a 1-d buffer of that size. This allows
the same behavior to be used in the `T.Buffer` syntactic sugar.
(e.g. `A: T.Buffer[16, "float32"]` instead of `A: T.Buffer[(16,), "float32"`)
* Fixed round-trip when buffer size contains an expression
* fixed hard-coded index in software pipeling
* fixed three-stage pipeline test
* add three stage pipelined gemm test
* refactor mma test
* use mma_4k schedule utility in test
* apply pipeling annotation
* black
* require ampere in test
Unlike ctypes, Cython by default do not release GIL when
calling into C API functions. This causes problems when the
function is long running. As the particular calling thread will
block other python threads by holding the GIL.
This PR explicitly releases GIL when calling into possible
long running functions. It fixes the timeout issue in
PopenPool which previously relied on another python thread
for timeout.
Added a regression test-case by changing sleep to sleep
in FFI, which previously will indefinitely block the popen tests.
Currently, we have functioning dynamic shared memory support on cuda. But we haven't actually explored allocating more than 48KB of dynamic shmem.
This PR updates the cuda runtime to support launching a kernel which wants to use dyn shmem of size > 48KB. This is already useful for manually rewritten schedules, but to integrate this feature into tuning requires more work (see the discussion on `VerifyGPUCode` below).
I'll add a test which actually uses a big dyn shmem in the next PR (need to fix one bug in software pipelining transform).
Reference in cutlass code:
https://github.com/NVIDIA/cutlass/blob/master/include/cutlass/gemm/device/gemm.h#L479-L482
* UnidirectionalLSTM added
* fixed missing import
* fixed pylint warnings
* black formatted tflite.py
* corrections according to reviewer comments
* fixed black formatting
* just to trigger the CI again
* assertion now tests that there are exactly 24 input tensors.
* black formatted tflite.py
* added explanatory comment regarding unused imports
* removed unused import
* nothing
* nothing
* added some details in a comment about the differences in unbind regarding to the version in common.py
* improved comment on unbind
* fix of black issue
(See https://discuss.tvm.apache.org/t/byoc-supporting-cutlass-byoc-with-collage/12796/6 for
context, which in turn is part of Collage (https://github.com/apache/tvm-rfcs/blob/main/rfcs/0062-collage.md).
This adds a new 'DSO exportable' runtime module representing the contents of a .o file. It
allows external codegen toolchains to yield a result which:
- Like CSource modules, can be conveyed directly to the final export_library compilation
step for linking into the final .so and saved to a know location without risk the
underlying code artifact will be lost.
- Like DSOLibrary modules, are self contained so that no additional compile-time arguments
need be conveyed from the CSource module to the final export_library command line
Since this is the third flavor of 'DSO exportable' module, add a Module::IsDSOExportable.
Since adding the above, can't resist also adding a Module::ImplementsFunction virtual and
calling it from TEComplier to check if an external codegen function actually provided the
implementation it promised.
Note:
- I've left the existing implementation of runtime.load_module alone which
relinks .o files to .so files.
- Though also contained in the .o metadata, I require static libraries to always
carry their list of exported function names.
This is all pretty stop gap pending a good rework of TVM to supoprt the notion of artifacts
and, perhaps, build rules.
* [microNPU] Expose compute cycle annotations to TIR lowering
Adds an AttrSttmt "compute_cycles_hint" to each NPU operation for later
passes to consume.
Change-Id: I09779bdab6de6ef2094db610bb20d6e052e68ee3
* compute_cycles->compute_cycles_hint
Change-Id: Iebd71e699522e92a28fd321ffdb41ed7924db4e0
* add test to check annotations in compilation flow
Change-Id: Idcdcc8c8b5536c4732f297246b71aa8378a2732c
* add compute cycles hints for copy operations
Change-Id: I007ba19732e16081fa2ea9baca40c64a653c93cf
* fixing annotations for copies and improving test coverage
Change-Id: Ib812c4151fab03f4c1adcc016b4e798003a22e5e
* rebase
Change-Id: I653101908706096ae25ad1ebf08e7b6c4f1196c7
* refine the code style (#10112)
* support more data types in oneDNN BYOC
* consider dtype when query layout
* support more translation of blocked layout
* refine log for invalid layout transform
* reset N and C for the weights
* support multi-blocking in TransDims2Plain()
* add tests for bf16 oneDNN BYOC
* unregister 'round' OP in oneDNN BYOC
* restore the criteria for fp32 tests
* disable test_prune_dnnl_subgraph for bf16
* fix typo in dnnl.py
* delete tag::format_tag_last
* delete 'is_weight' in layout2tag()
* reuse dtype_dl2dnnl()
* fix lint errors
* change to WARNING for invalid laytout transform
* skip bf16 tests if AVX512 is unavailable
* [TIR][Schedule] Added Schedule.transform_layout_sugared
* [TE][TIR] Reduced duplication in TE/TIR layout transformations
Previously, the implementations of `tir.IndexMap.from_func` and
`te.Stage.transform_layout` had significant duplication to handle
argument parsing. This commit extracts the shared logic into
`tir.IndexMap`.
* Enabled *args in Schedule.transform_layout_sugared
* Fix lint error
* Allow Schedule.transform_layout_sugared to set axis separators
* Merged transform_layout_sugared functionality into transform_layout
* Fix lint errors
* Fix lint error
* Fixed docstring errors
* Updated/tested TransformatLayoutTraits::UnpackedAsPython
* Disabled exec-used check for running trace.as_python()
* Updated SetAxisSeparatorTraits::UnpackedAsPython
* Updated unit test that was added in merge commit
* Fixed the argument name for TensorizeTraits
This wasn't checked before, but was the only other issue caught by the
updates to verify_trace_roundtrip.
* Re-enable type checks of transform_layout/set_axis_separator
Disabled while waiting for https://github.com/apache/tvm/pull/11289,
which was required for the `Tuple` argument.
* Updated a few additional transform_layout usages from main
* Finish support for list-of-targets
This finishes the work started in https://github.com/apache/tvm/pull/11173 to support
'external codegen' targets in the N build-like API surfaces.
- It turns out it's ok if a build is given only a single 'external codegen' target, so remove that check
in CompilationConfig::Init. When Collage builds a 'candidate partition' it does so for a single target.
As far as Collage is concerned it does not care whether the target is regular (eg Target("cuda")), or
for a specific external codegen (eg Target("cutlass")), it just passes the target into the build.
- Add CompilationConfig::FindPrimitiveTargetForKind which I'll later need to retrieve
the external codegen Target instance corresponding to a "Compiler" attribute value.
- Target.update_target_host_consist was supporting three API styles:
- single target
- map from device type to target
- map from target to IRModule (for the ir_to_runtime API)
I replaced all those calls with a more specialized 'canonicalize' call:
- Target.canonicalize_target_and_host
- Target.canonicalize_multi_targets_and_host
- Target.canonicalize_target_map_and_host
In particular, all the tuning interfaces (task extraction, tuning, tuning records) all explicitly
*do not* support multiple targets since the underlying code just doesn't support that.
* - Lints
- Revert unintended changes
* - more lints
* - Fix model_library_format handling of target.
- Improve comments in compilation_config.h
* - Lints
- Update target/target_host params documentation
* - Fix micro library format tests
- Rev micro library format from 5 to 6
- Use Target.current() in a few places
* - eta contract comprehension
* - Woops, one more device: target map left
- Handle host already being in Target
* - lint
* - lint
* - Bug with append
- Take device type from target
* - Fix hexagon
* Fix int8 cuda kernels on older SM versions
* Update target.py
* Simplify initialiasation of do_tensorize
* Simplify initialization of do_tensorize dense
* Simplify initialization of do_tensorize in group_conv_nchw
* Fix tensorize for conv2d_int8 as well.
* Try to make linter happy
* make linter happy
* Fix wrong commit to auto_scheduler
The current meta-schedule uses a PostProc `RewriteUnboundBlock` to auto-bind blocks to threads. However, it's a post proc, which means there are no search opportunities, and always splits with `factor=1024`.
This PR adds a new search rule called `AutoBind` to do a similar thing to bind threads with sampled factors. Also with a corresponding mutator.
After applying this rule, we get some positive perf results (on RTX-3080):
Element-wise: from 2.76 us to 2.48 us
Conv2d Winograd: from 29.45 us to 18.96 us (ansor 22.00 us)
Resnet18: from 0.591 ms to 0.531 ms (ansor 0.565 ms)
* [Schedule] Allowed typing.Tuple in tir.schedule._type_checker
Previously, `typing.Tuple` annotations could not be used with
`tir.schedule._type_checker.type_checked` annotations. This allows
`Tuple` type annotations to be type-checked.
* Revert change, allow tuples input as List arguments
* Suppress mypy errors
Directly interacting with a type object would otherwise cause some
false positives.
* Corrected unit test for allowing tuples to be used as typing.List
* Represent multi-type lists as List[Union[...]] instead of List[Any]
This gives a better error message and plays nicely with _type2str,
since `typing.Any` doesn't have a `__name__` field.
* Fix function number datatype from char to uint16_t
rewrite the modified part to pass lint check
Use 2 bytes for func num in fun_registry
Fix errors in linter
Add the declaration of the helper functions
set 2 bytes for func num in func_registry test units
pass num_func by value
This commit change the datatype of the number of the function from 1 Byte to 2 Bytes.
Besides, I use some helper functions to access the number of function and the first function name.
* Fix aot_executor_module to unbreak CI.
* Fix GraphExecutorModule.
* Remove graph_json_to_c_func_registry.
* No longer needed and not called anywhere.
* Superseded by emitting the FuncRegistry directly in codegen.
Co-authored-by: 嚴中璟 <a1245967@gmail.com>
* [microNPU] Fix bug in channels extraction in the matcher
If the input tensor layout is in NHCWB16, we were passing W value
instead of the channels to get_valid_block_configs.
* Add test for conv2d
* [TFLite] Add support to int16 data type in TFLite frontend
Add support for int16 data type and int64 biases/accumulators in
the TFLite frontend.
Adjusts TFLite tests to cover int16 convolutions and element-wise;
Fixes a minor typo negtive->negative in the element-wise tests.
* Update src/relay/qnn/op/convolution.cc
Co-authored-by: Elen Kalda <elen.kalda@arm.com>
Co-authored-by: Elen Kalda <elen.kalda@arm.com>
* [TVMC][ETHOSN] Improve target string to avoid duplication
Improves the TVMC target string to avoid duplication of the
NPU variant. The new target string will require the just the NPU
name followed by -variant=n78. The old target string is deprecated
and will be removed in a subsequent version of TVM.
Change-Id: I4638f36788df3f478435ac13d3531aad2b23f204
* fix linting
Change-Id: I76a9da511899f24a163be669877605cd1a440022
* fix make variant functions and update test error message
Change-Id: Iff553d4b255c0ce0b86bad42eaa94ee9b1c62508
* [TVMScript] Support function call to help construct AST
* add test
* update test
* more comment
* fix for avoiding Buffer.vload(...) case
* update parse error msg
* wrap func call with try / catch, emit error msg
* silence pylint
Jocelyn S